The OBDH is required to keep track of the time so that each payload event can be located within the satellites orbit, and combined with and ADCS reading and the map of Earth's magnetic field can give the attitude for each payload events.

It has been decided to use a software based clock, driven by a timer interrupt. This is vulnerable to potential inaccuracies if the interrupt is not serviced in a timely manner. This can be made less likely by setting the period of the timer to be long (up to 8 seconds) but this means that although a failure to service the interrupt is less likely to occur, a greater inaccuracy is caused if there is a failure.

In order to produce valid data from the mission, the degree of error in the timer must be known. This requires modeling a) how frequently interrupts with higher priority than the timer occur and b) how long they take to resolve. Having created such a model we must then verify that the degree of error is acceptable for the payload team.

Such modeling is problematic, as there is no general solution for how long it takes a particular piece of code to execute, or whether or not it will reach a certain point (this is known as the Halting Problem). A statistical solution must be derived through testing of the software under accurately simulated conditions.


There are a number of clock sources on board:

LFXT1CLK – this clock is driven by a watch crystal, but we need to find out whether or not there is such a crystal included with our board

XT2CLK – another crystal driven clock

DCOCLK – digital on board clock; this is our main timing source at the moment

We need to find out what crystals are available on the board. The manual seems to indicate that the board does not come with crystals already in place, and we will have to supply our own. Presumably, the CPU by default is driven from DCOCLK

The clocks drive three signals;

ACLK – LFXT1CLK divided by 1, 2, 4 or 8

MCLK – Selected from any source, divided by 1, 2, 4 or 8 – drives CPU

SMCLK – Selected from any source, divided by 1, 2, 4 or 8

There are two timers, Timer A and Timer B. Timer A will be used for short term (millisecond range) delays and Timer B is for long term (between contacts with ground station) timing.

Timer A is to be sourced from ACLK, and timer B is to be sourced from SMCLK. SMCLK wil lbe exclusively used by B, whilst ACLK will be shared with other systems that require internal timing (for example, the SD card).

Current code

#define DEBUG

#ifdef DEBUG
#include <stdio.h>
#include <time.h>

void waitms(float timems) {
  time_t seconds, start;


  while((seconds-start)<timems) {

void flip() {

#ifndef DEBUG
void waitms(int time) {
  TACCR0=time; //assumes one run of clock=1ms
  TACTL=0x01D2; //Resets timer, sources from ACLK/8, and sets to count up to TACCR0

void flip() {

int main() {
  while (1) {
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