Obdh Interfaces

Interfaces Overview

12 bit Analogue to Digital Converter (ADC)

The ADC will be used to sample the output from ADCS, sample the temperature reading from the CPU and sample the Payload output.

The ADC samples between two set reference voltages. It has a reference generator which can be used to generate 1.5v and 2.5v reference voltages for use with sampling.

To access the on-board temperature sensor, a pre defined input channel is sampled. This can be handled entirely by the board with no involvement of external subsystems, and should not affect their operation.

Further information can be found on the ADC page.

Direct Memory Access (DMA)

In Direct Memory Access (DMA) mode, an external device can transfer blocks of data from one area of the processors address space to another.

The DMA consists of three independent channels, each one capable of operating in one of four addressing modes:

  • Fixed address to fixed address – simply moves data from one location to another
  • Fixed address to block of addresses - data is taken from one location and repeatedly written to a list of consecutive addresses
  • Block of addresses to fixed address – data is taken from a series of consecutive addresses and written to a single location
  • Block of addresses to block of addresses – data is taken from a series of address to a corresponding address at another point in memory

It is also capable of transferring byte-to-byte, byte-to-word, word-to-byte, and word-to-word. Given the nature of our data, we will only be using byte-to-byte transfers

Data can be transferred from the onboard ADC to a location where it can be read and stored, and in this case the second mode is likely to be used, in order to create a stack.

Also, it is possible to write data directly to the memory using the first mode, if 256 bytes are set aside containing the numbers 0 to 255, and these numbers are repeatedly copied as necessary. This is slightly slower as it requires initialising the DMA channel each byte.

Each transfer requires one or two clock cycles (125ns – 250ns at 8Mhz) to initialise the DMA channel, and a further three clock cycles (375ns at 8MHz) for each byte/word transferred. This gives an approximate data rate of 2.5 Megabytes/s for transferring from the ADC, and a minimum of 1.5 Megabytes/s for directly writing data to memory.

Digital I/O

The board has 6 digital I/O ports, designated P1 to P6. The first two, P1 and P2 have an interrupt capability. Each port has 8 lines, each of which can be individually configured to input or output. Configuration of ports is handled by software.

A single port with all 8 lines as output, can output one byte per two clock cycles (250ns at 8MHz) giving a data rate of 3.8 Megabytes/s.

Inputting requires that the microcontroller actively check the status of a port’s lines, which requires it being alerted to the fact new data is being sent. This is likely to produce large overheads and so is only recommended for sending large amounts of data to the board.

P1 and P2 each trigger a separate interrupt vector. However, it is trivial to program the interrupts such that they can execute separate functions depending on the signals received at the time of interrupt. It is likely we can use a single interrupt vector for all satellite functions.

Current usage of interface
Link to Excel file detailing interfacing information: here

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